A chip package is the housing in which a computer chip is placed and which is soldered to a printed circuit board (hereinafter “PCB”). The chip package is soldered to the PCB at multiple, evenly-spaced locations to create multiple signal paths between the chip and the PCB (referred to herein as signal paths between the chip package and the PCB). The ability to provide more and more input/output connections to a chip that is increasingly shrinking in size is an ever-present problem. Additionally, the multiple connections between the chip package and the PCB must be tested, and the ever-decreasing size of such items can complicate that task.
One conventional method for testing the connections providing the signal paths between the chip package and the PCB includes providing vias (or holes) through a bottom surface of the PCB that allow access to the connections between the PCB and the chip package. Then, probes from a test device can be inserted into the vias to contact the connections to thereby test the signal paths between the PCB and the chip package. However, this method requires access to the back of the PCB, which may not be available for a PCB installed in a device. Additionally, this method may not provide accurate test measurements because of the test location on the underside of the PCB. Typically, specifications are developed for data signals exiting the chip package. Such signals may have different performance or characteristics if measured at the via on the opposite side of the PCB instead of at the exit of the chip package.
Another conventional test method is to connect trace wires to the connections between the PCB and the chip package during the manufacturing process and to route the trace wires outside of the profile of the chip package. Then, a test probe can be connected to the trace wires to test the connections. However, this method requires additional manufacturing cost to provide the trace wires and adversely adds length, reflections, and/or other loss to the signal path in question.
Therefore, a need exists in the art for a device for testing the signal path connections between a chip package and a PCB. Additionally, a need exists in the art for a device for testing the exit connections of a chip package when mounted to a PCB.